As Asia’s only developer for memory testing and repair technologies, iSTART-TEK exclusively provides the solutions and customized design services. Its main products include EDA tools and IP (Intellectual Property). As the semiconductor industry gradually recovers, chip design companies are shifting towards a diversified business model, focusing on the development of various chips. Fields such as automotive electronics chips, artificial intelligence chips, ChatGPT-related chips, IoT chips, and consumer product chips have become battlegrounds for chip design companies. Therefore, standing out among numerous chip design companies and ensuring both the design quality and pricing of chips have become crucial factors.
In the first quarter of 2024, iSTART-TEK launched two IP products specializing in on-chip memory testing, namely EZ-Safety and EZ-TEC.
EZ-Safety is a dedicated IP designed for automotive electronic chips. It can meet the ISO 26262 specifications and assist automotive chip design companies in developing chips that comply with ISO 26262 standards more efficiently.
EZ-Safety can coexist with the existing memory testing circuits of automotive chip design companies, and conduct memory testing for the critical memories within automotive electronic chips. Prior to performing the critical memory tests within automotive electronic chips, EZ-Safety automatically backs up the data within those memories. Once EZ-Safety completes the testing process for the memory, it automatically restores the backed-up data to the memory if the read and write operations are error-free. However, if errors occur during the read and write operations of the memory, EZ-Safety will notify the chip’s control system, such as the CPU.
EZ-Safety is easy-to-use. Simply by linking EZ-Safety with the critical memories within automotive electronic chips, EZ-Safety will automatically complete data backup, memory testing, and data restoration.
The other IP product is EZ-TEC (Testing Element Change), which is a dedicated IP for memory testing designed based on iSTART-TEK’s U. S. patent “METHOD FOR GENERATING AN MEMORY BUILT-IN SELF-TEST ALGORITHM CIRCUIT”.
EZ-TEC can coexist with the existing memory testing circuits of chip design companies. This U. S. patent breaks down memory testing algorithms into elements, allowing users to reconstruct the architecture of any memory testing algorithm through element reorganization. With EZ-TEC, users can select the elements of the memory testing algorithm for the critical memories within the chip. After completing the CP (Chip Probe) test, if memory defects persist in the critical memories of the chip, chip design companies can use the JTAG (Joint Test Action Group) interface to rearrange the selected elements through permutations and combinations. This process forms a new memory testing algorithm. Subsequently, the chip can undergo testing for the critical memories using the new memory testing algorithm, effectively reducing the DPPM (Defective Parts Per Million).
The usage of EZ-TEC is straightforward. By simply connecting EZ-TEC to the critical memories within the chip and selecting the elements of the memory testing algorithm to be used, users can redesign the memory testing algorithm through JTAG. This allows for the post-production adoption of a new memory testing algorithm for the critical memories within the chip, along with a retesting of these critical memories to enhance chip quality.
EZ-Safety is an IP designed for automotive electronic chips, enabling automotive chip design companies to easily comply with ISO 26262 specifications for automotive electronic chips. It assists chip development companies in changing the memory testing algorithm even after production. This is particularly valuable for addressing situations where critical memory defects were not detected during the CP stage. By conducting a retesting of these critical memories with a new memory testing algorithm, EZ-TEC effectively reduces DPPM and improves chip quality.