START™ v3 (SoCs' Built-in Testing And Repairing Technology)
START™ v3 (SoC’s Memory Testing and Repairing Technology) is a comprehensive memory testing and repairing solution for generating BIST and BISR circuits which can be inserted into customers’ designs automatically. Its user-friendly interface and menu-style constructive configuration make it easy for users to implement DFT in any IC design.
Features
- Supports standalone repairing technical for memories without redundancy
- Supports UDM (User Defined Memory)
- Supports memory grouping setting
- Supports auto clock tracing
- Supports gate-cell insertion for power saving
- Supports POT (Power-On Testing)
- Supports DMT (Dynamic Memory Testing)
- Supports advanced testing algorithms for MRAM & ReRAM
- Smart fool-proof design
- No Memory instance limitation
- GUI interface
- Advanced repairing architecture
- Multi-chain design
- Bottom-up flow
- Programmable algorithm
- Multiple memory testing algorithms
Application
- Automotive
- SSD
- Security
- AI
- Edge Computing
- Network
- High Resolution TCON
- AIoT
Testing Interface
- JTAG
- IEEE 1149.7
- IEEE 1687