Customized Test Algorithms
iSTART-TEK has successfully obtained the U.S. patent for “METHOD FOR GENERATING A MEMORY BUILT-IN SELF-TEST ALGORITHM CIRCUIT,” and the User Defined Algorithm platform, UDA, utilizes the format of this patent. It allows for the removal of redundant elements and enables users to edit the algorithm file and define memory addresses on their own, which can shorten the test time. The platform is very intuitive to use. Regardless of the number of read or write operations you wish to include in your algorithm, simply write them directly into the file and activate the corresponding tool settings. Even if you desire an algorithm with a complexity of 68N or higher, it can be easily created.
Fault Introduction
In the circuits of memory, due to manufacturing processes, there may be occurrences such as necking or bridging of circuits, which means broken connections or adjacent circuits joining together. Additionally, over time, there may be an IR-drop that leads to open circuits. All these are collectively referred to as faults.