Impact of BIST and BISR on SoC
BIST and BISR significantly influence the functionality of a System on Chip (SoC). For instance, ChatGPT, which is an AI application, relies on advanced CPUs or GPUs for processing, necessitating substantial memory resources to ensure proper operation. After SoCs are fabricated at the wafer manufacturing plant, BIST is utilized for testing, and when memory issues are identified, BISR is employed for remediation. Moreover, AI wafers are produced using cutting-edge processes, which may result in static or dynamic failure issues during manufacturing.
Usage of BIST and BISR
BIST (Built-In Self-Test) can precisely detect both static and dynamic faults, but it is limited to identifying the defective areas. To transform a faulty wafer into a viable chip, BISR (Built-In Self-Repair) is required to substitute the defective memory with functional redundant memory, thereby restoring the wafer’s normal operation.
Main Advantages of BIST and BISR
iSTART-TEK has nearly 40 patents in the realm of BIST and BISR. The company’s BIST and BISR circuits, generated through a variety of high-performance memory testing algorithms, also have the smallest circuit area footprint. Furthermore, customer feedback has confirmed that iSTART-TEK’s EDA tools can rapidly produce BIST and BISR circuits across different types of chips, assisting customers in identifying memory defects and effectively enhancing the quality and yield of their SoC.