iSTART-TEK (TW: 6786), Asia’s only EDA tool and IP provider of memory testing and repair solutions, has held a training course called “The Implementation of Built-in Self Testing Circuits in Embedded Memories of SoCs” in the 2023 winter vacation chip design class of Taiwan Semiconductor Research Institute (TSRI) at the National Applied Research Laboratories. The purpose of this course is to help the semiconductor industry cultivate chip design talents and establish a solid foundation in academic research.
Said by iSTART-TEK, the participants are majorly the students and professionals from well-known colleges and universities. Conducted by the senior R&D team of iSTART-TEK, his course contained the introduction and practice of EZ-BIST, an EDA tool powered by the company. The course offered a sequential curriculum design and support from the R&D team, allowing each participant to gain hands-on experience and a thorough understanding of the EZ-BIST operational process.
EZ-BIST memory testing circuit development environment is an GUI (Graphical User Interface) based EDA tool. It provides various built-in memory testing algorithms, allowing engineers to select the most suitable algorithms based on their chip development processes and applications. This tool facilitates implementation of memory testing algorithm circuits, and further shortens the time-to-market of the designed chips.
