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Jensen Huang Highlights the Arrival of the AI Factory Era; iSTART-TEK Expands High-Reliability Chip Testing Opportunities

By June 1, 2026June 11th, 2026No Comments

NVIDIA Founder and CEO Jensen Huang stated during his keynote at NVIDIA GTC Taipei 2026 that the AI industry has officially entered a new phase, shifting from “Can it work?” to “Can it generate profit and scale effectively?” He defined the AI Factory as the next generation of digital infrastructure. As Agentic AI, Physical AI, AI-native PCs, and edge computing continue to advance, semiconductor systems are facing significantly higher requirements for reliability, availability, and long-term operational stability.

Huang also introduced the concept of “Compute is Revenue,” emphasizing that future AI data centers will no longer be merely computing facilities but factories that produce AI tokens. When computing capacity directly translates into revenue generation, chip failures, system downtime, or insufficient reliability become business issues that can directly impact profitability.

Against this backdrop, iSTART-TEK, a company specializing in memory testing, repair, and Design-for-Test (DFT) technologies, is well positioned to benefit from the ongoing evolution of AI infrastructure.

In recent years, AI chips, HPC processors, and automotive SoCs have continued to increase their SRAM capacity. In advanced process nodes, SRAM can account for more than half of a chip’s total die area. As AI factories expand in scale, the impact of memory defects on system stability and computing availability becomes increasingly significant. iSTART-TEK’s START™ v5 platform, SRAM BIST/BISR solutions, and MART (MBIST Algorithm Recommendation Tool) help chip developers improve test coverage, enhance repair capabilities, and reduce potential risks during mass production.

Huang also highlighted Agentic AI as the next generation of computing, where AI systems will be capable of autonomously planning tasks, utilizing tools, and executing workflows over extended periods. NVIDIA’s collaboration with Cadence on semiconductor design Super Agents further signals the gradual adoption of AI-driven workflows across RTL generation, verification, debugging, and design processes.

According to iSTART-TEK, the vast amount of data generated by DFT, BIST, BISR, repair analysis, and diagnosis technologies could become valuable foundational data for AI-assisted design and AI-assisted debugging. By combining test data with AI analytics, semiconductor companies can not only improve development efficiency but also further optimize product quality and manufacturing yield.

Meanwhile, the rise of Physical AI, autonomous driving, robotics, and edge AI applications is driving increasing demand for functional safety, long-term operational stability, and high-reliability validation. Huang noted that future automotive AI and robotic systems will require more comprehensive testing and verification processes, making DFT, BIST, BISR, and diagnostic capabilities increasingly important.

iSTART-TEK believes that as the AI industry shifts its focus from raw computing performance toward system reliability, availability, and long-term operational stability, testing technologies will evolve from being viewed as cost centers to becoming key sources of competitive advantage. The company plans to continue advancing its memory testing algorithms, repair analysis technologies, and advanced DFT solutions to help customers develop highly reliable semiconductor products for the AI Factory, Edge AI, and Physical AI era.

In the AI infrastructure vision outlined by Jensen Huang, semiconductor chips are undoubtedly the core assets that generate revenue. Equally important are the testing and repair technologies that ensure those chips operate reliably, making them an indispensable foundation of the AI era.