July 18: UDA Modular Architecture SRAM Testing Algorithm Development Environment
With the increasing diversity of chip memory types, traditional memory testing methods have gradually become insufficient to meet market demands. The UDA (User-Defined Algorithm) platform developed by iSTART-TEK can fulfill the memory needs of the CIM (Compute-in-Memory) technology that require high computing performance, and satisfy customers’ memory testing for special types.
iSTART-TEK’s EDA tools START™ v3, EZ-BIST, and IP product EZ-TEC SRAM IP all support UDA. These tools enable customers to effectively extend memory testing algorithms through element rearrangement. The test algorithms generated by UDA can also be applied to EZ-TEC, thereby improving overall test coverage and flexibility while ensuring high efficiency and reliability throughout the testing process.
Highlights:
• Overview of the User-Defined Algorithm
• Introduction to applications and deployment scenarios across different markets
• Practical implementation strategies and best practices