As the COVID-19 pandemic continues to impact our world, iSTART-TEK is contributing by providing convenient cloud memory test solutions for worldwide customers in the semiconductor industry.
iSTART-TEK’s EZ-BIST-Cloud is a memory testing tool customized for cloud services. EZ-BIST-Cloud fully adopts a GUI (Graphical User Interface) operation mode, which reduces human errors as well as time spent learning tools.
iSTART-TEK further mentioned that, due to the advancement of manufacturing processes, many IC design companies that develop IoT-related chips are increasing their demand for memory testing. Many MCU IC design companies are adding memory testing circuits to ensure product yields. Because the division of work in IC design and development is more specialized nowadays, many IC design companies require more specialized EDA tools for memory testing. In order to meet the needs of MCU-related IC design companies in terms of chip design cost and yield, iSTART-TEK has developed a testing method suited to MCU-related IC design companies that uses EDA tools. After subscribing to iSTART-TEK’s EZ-BIST-Cloud, users can use the system via the cloud to carry out memory testing circuit design.
iSTART-TEK completed the first version of EZ-BIST-Cloud on the cloud platform in the third quarter of this year, providing customers with fast and convenient EDA cloud services. With the help of EZ-BIST-Cloud, not only can the productivity of EDA products be optimized, but also their sales markets can be rapidly expanded.
Furthermore, iSTART-TEK also mentioned that in the future, customers will be able to directly create memory testing circuits through iSTART-TEK’s EDA Clouding service. In addition to improving cost-effectiveness and flexibility, this will speed up the design process and reduce product development times, thus allowing teams from different regions to collaborate, and helping IC design companies to shorten their product launch schedules. In short, iSTART-TEK’s EDA Clouding service provides a cost-effective, fast, total solution for IC design companies in the development of memory testing circuits.